The subject of the present invention in general pertains to a new Input-Output facility design that exploits high bandwidth integrated network adapters.
In a network computing environment, multitudes of commands and requests for retrieval and storage of data are processed every second. To properly address the complexity of routing these commands and requests, environments with servers have traditionally offered integrated network connectivity to allow direct attachments of clients such as Local Area Networks (LANs). Given the size of most servers, the number of clients usually is in the range of hundreds to thousands and the bandwidth required in the 10-100 Mbits/sec range. However, in recent years the servers have grown and the amount of data they are required to handle has grown with them. As a result, the existing I/O architectures need to be modified to support this order of magnitude increase in the bandwidth.
In addition, new Internet applications have increased the demand for improved latency. The adapters must support a larger number of users and connections to consolidate the network interfaces which are visible externally. The combination of all the above requirements presents a unique challenge to server I/O subsystems.
Furthermore, in large environments such as International Business Machines Enterprise System Architecture/390 (Enterprise System Architecture/390 is a registered trademark of International Business Machines Corporation), there are additional requirements that the I/O subsystem must remain consistent with existing support. Applications must continue to run unmodified, and error recovery and dynamic configuration must be preserved or even improved. Sharing of I/O resources must be enabled as well as the integrity of the data being sent or received. This presents new and complex challenges that need to be resolved.
In order to achieve bandwidths which are dramatically higher and still achieve other required challenges, a new system architecture is needed.
This application is being filed on the same day as the following related applications; Ser. Nos. 09/253,246; 09/253,250; 09/253,247; 09/253,248; 09/252,712; 09/252,552; 09/252,728; 09/252,730; 09/253,101; 09/253,286; 09/253,249; 09/252,556; 09/253,993; 09/253,658; 09/252,555; 09/255,641; 09/255,640; and 09/252,727.
A method and an apparatus for simulation of data in a computing system environment having a controlling program, a main memory, a plurality of hosts, at least one adapter and a queued-direct input/output device using a queued-direct input/output protocol. A pageable virtual machine is provided under control of a virtual-machine hypervisor in processing communication with one or more hosts. Simulation is then provided by strictly separating a set of protocol control blocks between those that contain main-memory addresses and those that do not. Copies of those control blocks that contain main-memory addresses is created and their addresses converted by the hypervisor from addresses used by the program in its virtual machine to real-memory addresses usable by the adapter.